GTL designs like most electronic circuits are optimized for a particular range of operating parameters. This is complicated by the fact that the majority of the circuitry is contained in the processor and chipset. Intel designs these circuits for stock operating speeds and voltages. Motherboards built with overclocking in mind can have this point of optimization shifted somewhat by the board manufacturer with board component selection and design. However there is a limitation to what the manufacturers can accomplish. Not only does the board still need to be stable at stock speeds but well below stock if such options as C1E are utilized. The board also has to come in at a predetermined price-point.

Most GTL designs are built around a differential amplifier that is used as a comparator. A differential amplifier is capable of outputting a preset voltage based on two input voltages. A differential amplifier is used because of its narrow threshold regions ensuring a sufficient noise margin with respect to output swing. One input is tied to VREF. This voltage is what the input is compared to and also is what VIH(min) and VIL(max) (VREF +/- the Threshold voltage) are derived from. The other input receives the incoming signal. If the voltage is below VIL(max) it is considered a logic low and if it is above VIH(min) it is a logic high. Based on these inputs the output will be equal to either VTT or ground. The input side of the differential amplifier is called the receiver and the output side is the driver.

 

 

GTL circuits are based on an open-drain output. An open-drain output is one that either sinks current or is at a high impedance. It is never the source of current. The output is connected to VTT through the termination resistor. When the output is in a low (logic 0) state it provides a path to ground for VTT and the bus is pulled low. When the output signal is required to be high (logic 1) the output stops conducting current and the bus returns to the voltage level of VTT. Two of the advantages of an open-drain configuration are its low-power requirement by not having to supply the high state current and the ability of multiple devices to communicate on the same bus.

 

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